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Parallel Cables


If you are using a Parallel Download Cable proceed to the Parallel Cable section.

If you have a MultiLINX Cable proceed to the MultiLINX Cable section.

Parallel Cable IV

Figure 2-2 Top View of the Parallel Cable IV

The new Xilinx Parallel Cable IV (PC IV) is a high-speed download cable that configures or programs all Xilinx FPGA, CPLD, ISP PROM, and System ACE MPM devices. The cable takes advantage of the IEEE 1284 ECP protocol and Xilinx iMPACT software to achieve download speeds that are over 10 times faster than the PC III. The cable automatically senses and adapts to target I/O voltages and is able to accommodate a wide range of I/O standards from 1.5V to 5V.

PC IV supports the widely used industry standard IEEE 1149.1 Boundary-Scan (JTAG) specification using a four-wire interface. It also supports the Xilinx Slave Serial mode for Xilinx FPGA devices. It interfaces to target systems using a ribbon cable that features integral alternating ground leads to reduce noise and increase signal integrity.

The cable is externally powered from either a power brick or by interfacing to a standard PC mouse or keyboard connection. A
bi-color status LED indicates the presence of operating and target reference voltages.

Connecting to Host Computer

The PC IV connects to any PC using Win2000, Win XP, or through the standard IEEE 1284 DB25 parallel (printer) port connector. To fully utilize the higher speeds of this cable, the host PC must have a parallel port that supports extended capability port (ECP) mode. If ECP mode is not enabled, the PC IV defaults to compatibility mode and does not run at the optimum speeds listed.

Cable Power

The host interface cable (Figure 2-3) includes a short power jack for connection to one of two possible +5V DC power sources: (1) an external AC adapter or (2) the keyboard or mouse port of the host PC (shown). The supplied power splitter cable is required when using the second option. The splitter cable is installed between the mouse cable and the standard 6-pin mini-DIN (PS2) connector on the host PC. PC IV operating current is less than 100 mA. It draws approximately 15 mA from the target board’s reference voltage supply to power the JTAG/Slave Serial buffers.

Figure 2-3 Parallel Cable IV Parallel and PS2 Connection

High Performance Ribbon Cable

An insulation displacement (IDC) ribbon cable is supplied and recommended for connection to target systems. This cable incorporates multiple signal-ground pairs and facilitates error-free connection. A very small footprint, keyed mating connector is all that is required on the target system.

The Parallel Cable IV can also interface to target systems using flying lead wires. However, these are not included with PC IV and can be purchased separately. The ribbon cable is recommended for new designs to attain optimal speeds.

Figure 2-4 High Performance Ribbon Cable

Note Ribbon Cable - 14 conductor 1.0mm centers Round Conductor Flat Cable; 28 AWG (7x36) stranded copper conductors; gray PVC with pin 1 edge marked.

Note 2mm Ribbon Female Polarized Connectors - IDC connection to ribbon; contacts are beryllium copper plated; 30 micro inches gold plating over 50 micro inches nickel; connectors mate to 0.5mm square posts on 2mm centers.

Target Board Header

Figure 2-5 Target Interface Connector Signal Assignments

Table 2-4 Mating Connectors for 2mm pitch, 14 Conductor Ribbon Cable
Manufacturer
SMT. Vertical
SMT. Right Angle
Through-Hole Vertical
Through-Hole Right Angle
Molex
87332-1420
N/A
87331-1420
87333-1420
FCI
95615-114
N/A
90309-114
95609-114
Comm Con
Connectors
2475-14G2
N/A
2422-14G2
N/A

Parallel Cable III

Figure 2-6 Top and Bottom View of Parallel Download Cable III

The Parallel Download Cable III consists of a cable assembly containing logic to protect your PC‘s parallel port and a set of headers to connect to your target system. PC III was replaced by PC IV in March 2002 with legacy support from iMPACT.

Using the Parallel Download Cable requires a PC equipped with an AT compatible parallel port interface with a DB25 standard printer connector. Figure 2-6 shows the Parallel Download Cable.

Connecting for System Operation

Connect the parallel cable to the host system and your target system as shown in Figure 2-3.

Figure 2-7 Parallel Download Cable III and Accessories

The parallel download cable can download to a single device or several devices connected in either a Boundary-Scan chain or a slave-serial daisy chain (FPGA only). The parallel cable can be used to read back configuration and Boundary-Scan data.

The transmission speed of the Parallel Download Cable is determined solely by the speed at which the host PC can transmit data through its parallel port interface.

Figure 2-8 Parallel Download Cable Connection to JTAG Boundary-Scan TAP

JTAG parallel cable schematic contains schematic diagrams of the Parallel Download Cable.

Table 2-5 Parallel Cable Connections and Definitions
Name
Function
Connections
Vcc
Power – Supplies Vcc (5 V, 3.3V, or 2.5V, 10 mA, typically) to the cable.
To target system Vcc
GND
Ground – Supplies ground reference to the cable.
To target system ground
TCK
Test Clock – this clock drives the test logic for all devices on Boundary-Scan chain.
Connect to system TCK pin.
TDO
Read Data – Read back data from the target system is read at this pin.
Connect to system TDO pin.
TDI
Test Data In – this signal is used to transmit serial test instructions and data.
Connect to system TDI pin.
TMS
Test Mode Select – this signal is decoded by the TAP controller to control test operations.
Connect to system TMS pin.

Serial Configuration Connection

Figure 2-9 Parallel Cable III Connections

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Table 2-6 Parallel Cable Connections and Definitions
Name
Function
Connections
Vcc
Power – Supplies Vcc (5 V, 3.3V, or 2.5V, 10 mA, typically) to the cable.
To target system Vcc
GND
Ground – Supplies ground reference to the cable.
To target system ground
CCLK
Configuration Clock --- is the configuration clock pin, and the default clock for readback operation.
Connect to system CCLK pin.
DONE (D/P)
Done/Program --- Indicates that configuration loading is complete, and that the start-up sequence is in progress.
Connect to system DONE pin.
DIN
Data In --- Provides configuration data to target system during configuration and is tristated at all other times.
Connect to system DIN pin.
PROG
Program --- A Low indicates the device is clearing its configuration memory.
Active Low signal is used to initiate the configuration process.
Connect to system PROG pin.


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